Field Programmable Gate Array technology is becoming more and more pervasive due to technology advancements that allow for very fast programmable hardware devices to be mass-produced at a low cost. The integration of programmable hardware and traditional sequential processors for serving a same application is also commonly found, as it is advantageous to be able to alternatively execute code sequentially or in parallel depending on the set of instructions. When defining code that could potentially run on sequential-type and parallel-type machines there arises a problem of compatibility. The problem is that most programming languages are sequential and it is necessary that hardware implementation be highly parallel. It is possible for some compilers to create a parallel structure from a sequential program definition. Although it is possible to translate a sequential program for parallel execution, it is a very complex task since sequential algorithms do not map easily onto parallel machines.
Alternatively, since HDL (Hardware Description Language) are parallel languages, they could be used to program parallel algorithms. There are good VHDL simulators that can be used to predict accurately the results. The drawback is that VHDL programming currently requires a high level of knowledge and experience.
Furthermore, special languages, mixing parallel and sequential abstractions, have been used. The execution of the resulting programs on sequential machines is more of a simulation, and the translation of such programs for parallel hardware leads to complex results often limited to a specific class of problems. There exist a need for structures that can be easily mapped onto parallel hardware and that would efficiently execute without changes on sequential machines.
There exists therefore a need for a user-friendly programming environment, single or multi-threaded, that would be flexible and unrestricted at the same time.
Therefore, there exists a need for a method of programming that is portable and can be implemented on sequential processors and on FPGAs.